1. Field of the Invention
The present invention relates to a horizontal deflection drive circuit using a plurality of field effect transistors (FETs), specifically, to a horizontal deflection drive circuit which employs a plurality of FETs having rapid operation speeds, to correct unbalance in low frequency drive condition and high frequency drive condition.
2. Discussion of Related Art
A display monitor generally displays a video signal generated by a host computer or personal computer as a visual image. In the display monitor, electron beam is emitted from the electron gun of a cathode ray tube, to be impacted on the fluorescent screen by deflection operation performed by a deflection coil, thereby displaying the video signal. A conventional display monitor which displays video signals through the above operation is described below with reference to the attached drawings.
FIG. 1 is a block diagram showing the inner circuit of the conventional display device. Referring to FIG. 1, a host computer 100 includes a CPU 110 for receiving and processing a keyboard signal, and generating data according to the processing result, and a video card 120 for receiving the data from CPU 110, processing it to generate a video signal (R,G,B), and outputting a horizontal synchronous signal H-SYNC and vertical synchronous signal V-SYNC for synchronizing the video signal (R,G,B). A display device 200, which receives the video signal, horizontal and vertical synchronous signals HSYNC and V-SYNC output from video card 120 included in host computer 100, comprises a microcomputer 210 for receiving the horizontal and vertical synchronous signals to judge resolution, a control button 220 for generating a picture control signal for controlling a display monitor picture and outputting it, a horizontal and vertical output circuit 230 for receiving the monitor picture control signal from microcomputer 210 and a reference oscillation signal, to synchronize raster, a video circuit 240 for receiving and amplifying the video signal (R,G,B) from video card 120, and displaying it, and a power circuit 250 for supplying drive voltage to microcomputer 210, horizontal and vertical output circuit 230 and video circuit 240.
Inner blocks of display device 200 are described below in more detail. The horizontal and vertical synchronous signals H-SYNC and V-SYNC output from video card 120 of PC 100 are applied to microcomputer 210 which stores various picture control data. Microcomputer 210 outputs an image control signal for controlling an image displayed on the monitor picture and the reference oscillation signal according to the picture control signal applied from control button 220. The image control signal and reference oscillation signal are sent from microcomputer 210 to a horizontal and vertical oscillation signals processor 230-1 which applies a vertical pulse for controlling the switching speed of ON/OFF operation of a sawtooth generating circuit to a vertical drive circuit 230-2 according to the horizontal and vertical synchronous signals supplied from video card 120.
Vertical drive circuit 230-2, which receives the vertical pulse, generally employs an one-stage vertical amplifying type, or emitter follower type in which a signal is input to the base of transistor and output from its emitter. Accordingly, it improves linearity rather than gain. A vertical output circuit 230-3 which receives a current signal output from vertical drive circuit 230-2 generates sawtooth wave current which flows through a V-DY 230-4, corresponding to a vertical synchronous pulse, determining a vertical scanning cycle. Horizontal and vertical oscillation signals processor 230-1 outputs a horizontal oscillation signal to a horizonal drive circuit 230-5 which supplies current sufficient for turning on/off a horizonal output circuit 230-6. Horizontal drive circuit 230-5 is divided into an in-phase (the same polarity) mode in which the output port is turned on when the drive port is turned on, and reverse phase (reverse polarity) mode, being currently widely used, in which the output port is turned off when the drive port is turned on. Horizontal output circuit 230-6, which has received current from horizontal drive circuit 230-5 having the above characteristics, generates sawtooth wave current and sends it to an H-DY 230-7. This sawtooth wave current determines a horizontal scanning cycle.
To supply a stable DC voltage to the anode of a cathode ray tube (CRT) 240-3, a flyback collector according to a flyback transformer (FBT) 230-9 is employed and harmonics according to leakage inductance and distributed capacitance of high voltage circuit 230-8 are used, to generate high voltage and apply it to anode port 240-4-1 of CRT 240-4, even though the collector pulse is small. Anode port 140-4-1 creates high voltage on the anode surface of CRT 240-4 according to the applied high voltage.
Meanwhile, video signal processor 240 receives OSD data in accordance with the picture control from microcomputer 210, to output an OSD gain signal. The OSD gain signal output from OSD 240-1 and the video signal (R,G,B) applied from video card 120 are sent to a video pre-amplifier 240-2 which amplifies a low-level video signal (R,G,B) with a low voltage amplifier, maintaining a specific level of voltage of the signal. For example, a signal of below 1 Vpp (peak to peak voltage) is amplified to 4-6 Vpp. A video output amplifier 240-3 amplifies the pre-amplified signal of 4-6 Vpp to 40-60 Vpp, supplying energy to each pixel of the display. The video signal amplified by video output amplifier 240-3 is sent to the cathode of CRT 240-4, to be converted into electron beam, displaying an image according to the video signal on the picture of the monitor.
In case of selection of OSD, the OSD is selected by video pre-amplifier 240-2, amplified to a predetermined level, and finally amplified by video output amplifier 240-3, displaying the OSD data on the picture of CRT 240-4. The OSD data displayed on CRT 240-4 provides a user of display device 200 with functions of the display or information on it. As described above, the video signal (R,G,B) and OSD gain signal amplified by video main amplifier 240-3 are displayed as a visual image on the display picture, their luminances being controlled by the high voltage formed on the anode surface of CRT 240-4.
Power circuit 250, which supplies drive voltage for displaying the video signal on the display device picture, receives alternating current (AC) through an AC input terminal 250-1 to which common AC is applied. A degaussing coil 250-2 receives the AC through AC input terminal 250-1, and recovers colors spread caused due to terrestrial magnetism or external conditions to the original colors. For example, when AC is applied to degaussing coil 250-2 for 2 to 9 seconds, DC component of magnetism formed on a shadow mask in display device 200 is dispersed. This recovers the color spread caused by inexact deflection of electron beam to fluorescent material due to the DC component of magnetism.
DC rectified by a rectifier 250-3 is applied to a switching transistor 250-4. On application of DC, switching transistor 250-4 performs switching operation to supply various drive voltages required for inner blocks of display device 200 through a voltage regulator 250-5. Here, a pulse width modulation (PWM) IC 250-6 controls ON/OFF operations of switching transistor 250-4, to stabilize output voltage. Meantime, microcomputer 210 executes display power management signalling (DPMS) mode based on VESA standard such as power off mode and suspend mode according to the detection of the horizontal and vertical synchronous signals, reducing the power consumed in display device 200.
Horizontal drive circuit 230-5 and horizontal output circuit 230-6 of the conventional display monitor 200 are explained below in more detail. FIG. 2 is a block diagram of the horizontal drive circuit and horizontal output circuit of FIG. 1. Referring to FIG. 2, a horizontal oscillation circuit 230-1a of horizontal and vertical oscillation circuit 230-1 receives the reference oscillation signal from microcomputer 210, and generates a horizontal oscillation pulse according to the cycle of the reference oscillation signal. The horizontal oscillation pulse is applied to horizontal base drive circuit 230-5 which generates current sufficient for turning on/off a horizontal deflection transistor 230-6b of horizontal deflection circuit 230-6, outputting a horizontal drive pulse.
DC supplied fro voltage regulator 250-5 is applied to a deflection current supply circuit 250-6a, generating deflection current. This deflection current is supplied to a horizontal deflection transistor 230-6b of horizontal deflection circuit 230-6. Horizontal deflection transistor 230-6b to which the deflection current from deflection current supply circuit 230-6a is applied receives the horizontal drive pulse from horizontal base drive circuit 230-5, to be turned on or turned off. Depending on turning of/off of horizontal deflection transistor 230-6b, horizontal deflection sawtooth wave current generates at horizontal deflection yoke H-DY, to deflect the video signal applied to CRT 240-4. That is, the electron beam based on the video signal (R,G,B) is deflected according to the horizontal sawtooth wave current generated by horizonal deflection yoke 230-7, to display the video signal as a visual image on the CRT picture.
This conventional horizontal base drive circuit 230-5 is divided into a multi-synchronizing mode and single synchronizing mode. With the horizontal base drive circuit using the multi-synchronizing mode, it should satisfy each horizontal deflection in accordance with each of the multiple synchronizing modes using one of FET and bipolar transistor. Accordingly, the horizontal base drive circuit requires a large number of components in order to provide base drive suitable for each horizontal frequency in the multiple synchronizing modes. Furthermore, when low frequency drive condition does not correspond with high frequency drive condition in the single synchronizing mode, there is switching loss in the FET or bipolar transistor of the horizontal base drive circuit. Moreover, the discordance in the drive conditions generates heat in the FET or bipolar transistor, and thus a heatsink for emitting the heat becomes larger.